Hardware-Accelerated Network Control Planes

Abstract

One design principle of modern network architecture seems to be set in stone: a software-based control plane drives a hardware- or software-based data plane. We argue that it is time to revisit this principle after the advent of programmable switch ASICs which can run complex logic at line rate.

We explore the possibility and benefits of accelerating the control plane by offloading some of its tasks directly to the network hardware. We show that programmable data planes are indeed powerful enough to run key control plane tasks including: failure detection and notification, connectivity retrieval, and even policy-based routing protocols. We implement in P4 a prototype of such a “hardware-accelerated” control plane, and illustrate its benefits in a case study.

Despite such benefits, we acknowledge that offloading tasks to hardware is not a silver bullet. We discuss its tradeoffs and limitations, and outline future research directions towards hardware-software co-design of network control planes.

Research Areas: Data-Driven Networking and Network Programmability

People

Edgar Costa Molero

PhD student

Prof. Laurent Vanbever

Group Leader

Talk

BibTex

@INPROCEEDINGS{molero2018hardware-accelerated,
	isbn = {978-1-4503-6120-0},
	doi = {10.1145/3286062.3286080},
	year = {2018},
	booktitle = {Proceedings of the 17th ACM Workshop on Hot Topics in Networks (HotNets '18)},
	type = {Conference Paper},
	author = {Costa Molero, Edgar and Vissicchio, Stefano and Vanbever, Laurent},
	language = {en},
	address = {New York, NY},
	publisher = {Association for Computing Machinery},
	title = {Hardware-Accelerated Network Control Planes},
	PAGES = {120 - 126},
	Note = {17th ACM Workshop on Hot Topics in Networks (HotNets '18); Conference Location: Redmond, WA, USA; Conference Date: November 15-16, 2018}
}

Research Collection: 20.500.11850/309545

Slide Sources: https://gitlab.ethz.ch/projects/41287