FAB: Toward flow-aware buffer sharing on programmable switches

Authors: Maria Apostolaki, Laurent Vanbever, and Manya Ghobadi
Proceedings of the 2019 Workshop on Buffer Sizing


Conventional buffer sizing techniques consider an output port with multiple queues in isolation and provide guidelines for the size of the queue. In practice, however, switches consist of several ports that share a buffering chip. Hence, chip manufacturers, such as Broadcom, are left to devise a set of proprietary resource sharing algorithms to allocate buffers across ports. This algorithm dynamically adjusts the buffer size for output queues and directly impacts the packet loss and latency of individual queues. We show that the problem of allocating buffers across ports, although less known, is indeed responsible for fundamental inefficiencies in today’s devices. In particular, the per-port buffer allocation is an ad-hoc decision that (at best) depends on the remaining buffer cells on the chip instead of the type of traffic. In this work, we advocate for a flow-aware and device-wide buffer sharing scheme (FAB), which is practical today in programmable devices. We tested FAB on two specific workloads and showed that it can improve the tail flow completion time by an order of magnitude compared to conventional buffer management techniques.


Dr. Maria Apostolaki
PhD student


	isbn = {978-1-4503-7745-4},
	doi = {10.1145/3375235.3375237},
	year = {2019-12},
	booktitle = {Proceedings of the 2019 Workshop on Buffer Sizing},
	type = {Conference Paper},
	institution = {SNF},
	author = {Apostolaki, Maria and Vanbever, Laurent and Ghobadi, Manya},
	size = {6 p.},
	keywords = {buffer management; resource allocation; shared-memory switch; memory utilization; dynamic buffer threshold; dynamic partitioning; QoS guarantees; programmable data plane; data center},
	language = {en},
	address = {New York, NY},
	publisher = {Association for Computing Machinery},
	title = {FAB: Toward flow-aware buffer sharing on programmable switches},
	PAGES = {2},
	Note = {Workshop on Buffer Sizing (BS '19); Conference Location: Palo Alto, CA, USA; Conference Date: December 2-3, 2019; Conference lecture on December 3, 2019.}

Research Collection: 20.500.11850/403534